This invention relates to a gate driver integrated circuit for MOS gated devices, and more specifically relates to a monolithic gate driver circuit for MOS gated circuit devices, particularly those used in lamp ballast circuits.
Electronic ballasts for gas discharge circuits are coming into widespread use because of the availability of power MOSFET switching devices to replace previously used power bipolar transistor devices. Most electronic ballasts use two power MOSFET switches in a totem pole (half bridge) topology, with the gas discharge tube circuits consisting of L-C series resonant circuits in which the lamp or lamps are connected across one of the reactances of the L-C circuit. The power MOSFET switches are then driven to conduct alternately by inputs from secondary windings on a current transformer, the primary winding of which conducts the current of the lamp circuits. The primary winding current alternates at the resonant frequency of the resonant circuit.
Such prior art circuits have numerous drawbacks. For example, such circuits:
1. Are not self-starting and require a DIAC type device to initially pulse the circuit into operation. PA1 2. They have poor switch times. PA1 3. They are labor intensive due particularly to the need for a toroidal current transformer. PA1 4. The circuits are not amenable to dimming. PA1 1. It provides gate drive voltage signals for two MOS gated power semiconductors such as power MOSFETs or IGBTs, one designated as a "Low-side switch" and the other as a "High-side switch". The two power switches are commonly connected in a totem pole or half-bridge circuit. PA1 2. It provides level shifting circuits with a voltage offset capability greater than 600 volts to translate ground (substrate) referenced signals via an isolated portion of the silicon die to facilitate the drive function of the high side switch. PA1 3. A logic circuit referenced to ground (substrate) that consists of comparators, a voltage regulator to control the magnitude of the output signals when the driver is supplied from non-regulated d-c or a-c supplies, undervoltage lockout circuits to prevent marginal operation of the MOS power switches, a dead band delay circuit that prevents "shoot through" or cross-conduction currents from flowing in the MOS power switches, and a logic function that allows the high side and low side drive outputs to alternate on a 50% time basis. PA1 4. An additional logic output is provided so that the driver can self-oscillate at a frequency determined by external resistors and capacitors R.sub.T and C.sub.T, respectively, where the frequency of oscillation f.sub.0 is set by the relationship: ##EQU1## 5. The monolithic die can be packaged in a number of conventional packages, such as an 8-pin DIP or 8-pin SOIC. PA1 6. A novel start up sequence and power down sequence is employed to protect the power MOSFETs being driven and improves the predictability of this operation of the integrated circuit and the lamp ballast system.